Strategies for a Wide Memory Window of Ferroelectric FET for Multilevel Ferroelectric VNAND Operation-Reference-Cited by-同舟云学术

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Strategies for a Wide Memory Window of Ferroelectric FET for Multilevel Ferroelectric VNAND Operation

Published:2024-07 Issue:7 Volume:45 Page:1185-1188
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Myeong Ilho¹^ORCID,Kim Hyoseok²,Kim Seunghyun²,Lim Suhwan¹^ORCID,Kim Kwangsu¹^ORCID,Kim Wanki¹,Ha Daewon¹^ORCID,Ahn Sujin³,Song Jaihyuk³

Affiliation:

1. Advanced Device Research Laboratory, Semiconductor Research Center, Samsung Electronics, Hwaseong-si, Gyeonggi-do, South Korea

2. Innovation Center, Samsung Electronics, Hwaseong-si, Gyeonggi-do, South Korea

3. Advanced Technology Development, Semiconductor Research Center, Samsung Electronics, Hwaseong-si, Gyeonggi-do, South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/55/10577506/10531281.pdf?arnumber=10531281

Reference17 articles.

1. Reviewing the Evolution of the NAND Flash Technology

2. Investigation and Compact Modeling of the Time Dynamics of the GIDL-Assisted Increase of the String Potential in 3-D NAND Flash Arrays

3. Statistical poly-Si grain boundary model with discrete charging defects and its 2D and 3D implementation for vertical 3D NAND channels

4. Si Doped Hafnium Oxide—A “Fragile” Ferroelectric System

5. Critical Role of Interlayer in Hf0.5Zr0.5O2 Ferroelectric FET Nonvolatile Memory Performance

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