Performance and Power-Efficient Design of Dense Non-Volatile Cache in CMPs-Reference-Cited by-同舟云学术

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Performance and Power-Efficient Design of Dense Non-Volatile Cache in CMPs

Published:2018-07-01 Issue:7 Volume:67 Page:1054-1061
ISSN:0018-9340
Container-title:IEEE Transactions on Computers
language:
Short-container-title:IEEE Trans. Comput.

Author:

Jadidi Amin^ORCID,Arjomand Mohammad,Kandemir Mahmut T.,Das Chita R.

Funder

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Link

http://xplorestaging.ieee.org/ielx7/12/8375033/08265206.pdf?arnumber=8265206

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. POEM: Performance Optimization and Endurance Management for Non-volatile Caches;ACM Transactions on Design Automation of Electronic Systems;2024-09-04

2. Selective Caching: Avoiding Performance Valleys in Massively Parallel Architectures;2020 28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP);2020-03

3. Integer linear programming model for allocation and migration of data blocks in the STT‐RAM‐based hybrid caches;IET Computers & Digital Techniques;2020-02-10

4. Periodic learning-based region selection for energy-efficient MLC STT-RAM cache;The Journal of Supercomputing;2019-04-08

5. NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2018-11

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