Periodic learning-based region selection for energy-efficient MLC STT-RAM cache-Reference-Cited by-同舟云学术

Periodic learning-based region selection for energy-efficient MLC STT-RAM cache

Published:2019-04-08 Issue:10 Volume:75 Page:6220-6238
ISSN:0920-8542
Container-title:The Journal of Supercomputing
language:en
Short-container-title:J Supercomput

Author:

Shen Fanfan^ORCID,He Yanxiang,Zhang Jun,Xu Chao

Funder

National Natural Science Foundation of China

Natural Science Foundation of Jiangsu Province

Natural Science Research of Jiangsu Higher Education Institutions of China

Key Research Topics of Jiangsu Education Science 13th Five-Year plan

Collaborative Innovation Center of Audit Information Engineering and Technology

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Information Systems,Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/s11227-019-02846-1.pdf

Reference25 articles.

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2. Park J, Yim YU (2018) Two-phase read strategy for low energy variation-tolerant STT-RAM. IEEE Trans Very Large Scale Integr Syst 26(12):2584–2590

3. Kuan K, Adegbija T (2018) LARS: logically adaptable retention time STT-RAM cache for embedded systems. In: 2018 Design, Automation Test in Europe Conference Exhibition (DATE), pp 461–466

4. Nasri A, Fathy M, Broumandnia A (2018) An energy-efficient 3D-stacked STT-RAM cache architecture for cloud processors: the effect on emerging scale-out workloads. J Supercomput 74(4):1547–1561

5. Sayed N, Bishnoi R, Oboril F, Tahoori MB (2018) A cross-layer adaptive approach for performance and power optimization in STT-MRAM. In: 2018 Design, Automation Test in Europe Conference Exhibition (DATE), pp 791–796

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