Wide SOA and High Reliability 60-100 V LDMOS Transistors with Low Switching Loss and Low Specific On-Resistance

Author:

Matsuda Jun-ichi,Kuwana Anna,Kojima Jun-ya,Tsukiji Nobukazu,Kobayashi Haruo

Publisher

IEEE

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Novel Step Field Plate RF LDMOS Transistor for Improved BVDS-R on Tradeoff and RF Performance;IEEE Transactions on Electron Devices;2022-08

2. Modeling Technologies from Analog/Mixed-Signal Circuit Designer Viewpoint;2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2022-03-06

3. Process and performance optimization of Triple‐RESURF LDMOS with Trenched‐Gate;International Journal of RF and Microwave Computer-Aided Engineering;2021-08-10

4. Optimization of High Reliability and Wide SOA 100 V N-LDMOS Transistor;IEEJ Transactions on Electronics, Information and Systems;2020-11-01

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