Modeling Technologies from Analog/Mixed-Signal Circuit Designer Viewpoint
Author:
Affiliation:
1. Gunma University,Japan
2. Teikyo-Heisei University,Japan
3. Renesas Electronics,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9797886/9797892/09798126.pdf?arnumber=9798126
Reference25 articles.
1. A Switching Sequence for Unary Digital-to-Analog Converters Based on a Knight’s Tour
2. Layout Dependent Effect: Impact on Device Performance and Reliability in Recent CMOS Nodes;chen;IEEE ICMTS,2015
3. Charge-Based MOS Transistor Modeling
4. Analysis of Switching Characteristics of Wide SOA and High Reliability 100V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure;kuwana;IEEE ASICON,2021
5. Wide SOA and High Reliability 60-100 V LDMOS Transistors with Low Switching Loss and Low Specific On-Resistance
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