A Support Vector Regression based Machine Learning method for on-chip Aging Estimation
Author:
Affiliation:
1. University of Liverpool,Dep. of Electrical Engineering and Electronics,Liverpool,UK
2. University of Pisa,Dep. of Information Engineering,Pisa,Italy
Funder
University of Liverpool, UK
University of Pisa, Italy
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9676371/9676186/09676376.pdf?arnumber=9676376
Reference26 articles.
1. Parametric counterfeit IC detection via Support Vector Machines
2. Leveraging CMOS Aging for Efficient Microelectronics Design
3. Negative bias temperature instability: What do we understand?
4. Reliable Power Gating With NBTI Aging Benefits
5. Aging Benefits in Nanometer CMOS Designs
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1. Golden-Free Robust Age Estimation to Triage Recycled ICs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09
2. Remaining useful life (RUL) regression using Long–Short Term Memory (LSTM) networks;Microelectronics Reliability;2022-12
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