Breakdown voltage in LDMOS transistors using internal field rings
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx1/16/2788/00085166.pdf?arnumber=85166
Cited by 23 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Performance and Reliability Co-design of Ultra High Voltage LDMOS Devices;2022 IEEE International Conference on Emerging Electronics (ICEE);2022-12-11
2. Evaluation of GaN HEMTs in H3TRB Reliability Testing;Electronics;2022-05-11
3. Hybrid gate dielectric with Si3N4 stressor for LDMOSFET;2021 IEEE Latin America Electron Devices Conference (LAEDC);2021-04-19
4. Effect of SOI LDMOS Epitaxial Layer Thickness on Breakdown Voltage;2018 International Symposium on Computer, Consumer and Control (IS3C);2018-12
5. Evaluation of a “Field Cage” for Electric Field Control in GaN-Based HEMTs That Extends the Scalability of Breakdown Into the kV Regime;IEEE Transactions on Electron Devices;2017-09
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