Current-Steering DAC Calibration Using Q-Learning
Author:
Affiliation:
1. School of Integrated Circuits, Tsinghua University,Beijing,China,10084
2. Research Institute of Tsinghua University in Shenzhen,Guangdong,China
Funder
Science, Technology and Innovation Commission of Shenzhen Municipality
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10181241/10181318/10181806.pdf?arnumber=10181806
Reference9 articles.
1. A 600-MS/s DAC With Over 87-dB SFDR and 77-dB Peak SNDR Enabled by Adaptive Cancellation of Static and Dynamic Mismatch Error
2. An ISI Scrambling Technique for Dynamic Element Matching Current-Steering DACs
3. Design and Analysis of a 12-b Current-Steering DAC in a 14-nm FinFET Technology for 2G/3G/4G Cellular Applications
4. Redundancy-bandwidth scalable techniques for signal-independent element transition rates in high-speed current-steering DACs
5. Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A 14-bit 6GS/s DAC Achieving >65dBc SFDR with Bilateral Output Impedance Compensation in 22nm CMOS;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. On the Segmentation of Gigasample Rate Current Steering DACs;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
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