An ADPLL with Two-Point Modulation Gain Calibration for 2.4GHz ISM-Band in 40nm CMOS
Author:
Affiliation:
1. Center of Analog/RF Integrated Circuit (CARFIC), Shanghai Jiao Tong University,Department of Micro/Nano Electronics,Shanghai,China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10181241/10181318/10181799.pdf?arnumber=10181799
Reference8 articles.
1. A 486 µW All-Digital Bluetooth Low Energy Transmitter with Ring Oscillator Based ADPLL for IoT applications
2. An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS
3. A fully integrated 28nm Bluetooth Low-Energy transmitter with 36% system efficiency at 3dBm
4. All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS
5. A 20 Mb/s Phase Modulator Based on a 3.6 GHz Digital PLL With −36 dB EVM at 5 mW Power
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