Fault Models and Test Methods for Subthreshold SRAMs-Reference-Cited by-同舟云学术

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Fault Models and Test Methods for Subthreshold SRAMs

Published:2013-03 Issue:3 Volume:62 Page:468-481
ISSN:0018-9340
Container-title:IEEE Transactions on Computers
language:
Short-container-title:IEEE Trans. Comput.

Author:

Lin Chen-Wei,Chen Hung-Hsin,Yang Hao-Yu,Huang Chin-Yuan,Chao Mango C.-T.,Huang Rei-Fu

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Link

http://xplorestaging.ieee.org/ielx5/12/6425383/06112749.pdf?arnumber=6112749

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. SRAM Memory Testing Methods and Analysis;Advances in Systems Analysis, Software Engineering, and High Performance Computing;2023-12-18

2. Error-Tolerant Data Sketches Using Approximate Nanoscale Memories and Voltage Scaling;IEEE Transactions on Nanotechnology;2022

3. A Novel BIST Algorithm for Low-Voltage SRAM;2019 IEEE International Test Conference in Asia (ITC-Asia);2019-09

4. Testing of Embedded SRAMs Using Parasitic Extraction Method;9th International Conference on Robotic, Vision, Signal Processing and Power Applications;2016-09-30

5. Design of Peripheral Circuits for the Implementation of Memory Array Using Data-Aware (DA) SRAM Cell in 65 nm CMOS Technology for Low Power Consumption;Journal of Low Power Electronics;2016-03-01

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