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Error-Tolerant Data Sketches Using Approximate Nanoscale Memories and Voltage Scaling

  • Published:2022 Issue: Volume:21 Page:16-22
  • ISSN:1536-125X
  • Container-title:IEEE Transactions on Nanotechnology
  • language:
  • Short-container-title:IEEE Trans. Nanotechnology

Author:

Reviriego PedroORCID,Junsangsri PilinORCID,Liu ShanshanORCID,Lombardi FabrizioORCID

Funder

NSF

ACHILLES Project

Go2Edge Network

Spanish Agencia Estatal de Investigación

Madrid Community Research Project TAPIR-CM

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Science Applications

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Power-Aware Neuromorphic Architecture With Partial Voltage Scaling 3-D Stacking Synaptic Memory;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

2. Voltage over Scaling for Approximate Newton Method in Total Variation-based Image Denoising;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20

3. Approximate Newton method using frequency upscaling for total variation-based image denoising;2023 IEEE 3rd International Conference on Computer Systems (ICCS);2023-09-22

4. Low-Power k Nearest Neighbors Classifiers with Approximate Nanoscale Memories;2022 IEEE 22nd International Conference on Nanotechnology (NANO);2022-07-04

5. Compressing Distributed Network Sketches with Traffic-Aware Summaries;IEEE Transactions on Network and Service Management;2022
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