A Novel Axisymmetric SiC MOSFET Multichip Module with Staggered Terminals Design for Lowing Current Imbalance and Parasitic Inductance-Reference-Cited by-同舟云学术

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A Novel Axisymmetric SiC MOSFET Multichip Module with Staggered Terminals Design for Lowing Current Imbalance and Parasitic Inductance

Published:2024-05-17 Issue: Volume:29 Page:1970-1976
ISSN:
Container-title:2024 IEEE 10th International Power Electronics and Motion Control Conference (IPEMC2024-ECCE Asia)
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Author:

Ouyang Runze¹,Jiang Xi¹,Wang Ying²,Yuan Song¹,Ma Nianlong¹,Jia Daoyong¹,Gong Xiaowu¹

Affiliation:

1. Xidian University,Guangzhou Institute of Technology,Guangzhou,China,510555

2. Xidian University,School of Microelectronics,Xi’an,China,710071

Funder

Natural Science Foundation of Shaanxi Province

Innovation Fund

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10567049/10567050/10567056.pdf?arnumber=10567056

Reference17 articles.

1. High-temperature electronics - a role for wide bandgap semiconductors?

2. A High-Density, High-Efficiency, Isolated On-Board Vehicle Battery Charger Utilizing Silicon Carbide Power Devices

3. A Survey of Wide Bandgap Power Semiconductor Devices

4. Analysis of High-Speed PCB With SiC Devices by Investigating Turn-Off Overvoltage and Interconnection Inductance Influence

5. Anti-EMI Noise Digital Filter Design for a 60-kW Five-Level SiC Inverter Without Fiber Isolation

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