Research on the Architecture and Implementation of In-Memory Computing
Author:
Affiliation:
1. China Telecom Research Institute,Guangzhou,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10199106/10201240/10201268.pdf?arnumber=10201268
Reference25 articles.
1. Recryptor: A Reconfigurable Cryptographic Cortex-M0 Processor With In-Memory and Near-Memory Computing for IoT Security
2. 24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning
3. Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays
4. XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks
5. Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks
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1. Efficient Hardware Acceleration of Mean Squared Error Calculation Through In-Memory Computing;2024 IEEE International Conference on Omni-layer Intelligent Systems (COINS);2024-07-29
2. Channel Estimation using Processing In Memory Based on System Identification Technique;2024 11th International Conference on Wireless Networks and Mobile Communications (WINCOM);2024-07-23
3. Hardware Realization of Vector and Matrix Norm Calculation for Signal Processing Applications;2024 11th International Conference on Wireless Networks and Mobile Communications (WINCOM);2024-07-23
4. Multidimensional Euclidean Distance Calculation using In-Memory Computing;2024 International Conference on Computer, Information and Telecommunication Systems (CITS);2024-07-17
5. Novel Computational Kernels for Signal Processing and Digital Transformation;2024 IEEE 22nd Mediterranean Electrotechnical Conference (MELECON);2024-06-25
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