Author:
Ouchet Florent,Morin-Allory Katell,Fesquet Laurent
Cited by
8 articles.
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1. Slow Slopes for Optimizing the Fault Detection in Secure QDI Circuits;Lecture Notes in Networks and Systems;2023
2. Beware the Dynamic C-Element;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2014-07
3. Hardening QDI circuits against transient faults using delay-insensitive maxterm synthesis;Proceedings of the 24th edition of the great lakes symposium on VLSI - GLSVLSI '14;2014
4. Formal Deadlock Verification for Click Circuits;2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems;2013-05
5. Verification of Building Blocks for Asynchronous Circuits;Electronic Proceedings in Theoretical Computer Science;2013-04-26