Author:
Verbeek Freek,Joosten Sebastiaan,Schmaltz Julien
Cited by
3 articles.
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1. Formal Verification of Flow Equivalence in Desynchronized Designs;2020 26th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC);2020-05
2. A Structured Visual Approach to GALS Modeling and Verification of Communication Circuits;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2017-06
3. Verification of Building Blocks for Asynchronous Circuits;Electronic Proceedings in Theoretical Computer Science;2013-04-26