A Novel Methodology to Predict Process-Induced Warpage in Advanced BEOL Interconnects
Author:
Affiliation:
1. National Tsing Hua University,Department of Power Mechanical Engineering,Hsinchu,Taiwan
2. Taiwan Semiconductor Manufacturing Company,Hsinchu,Taiwan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10117589/10117581/10117795.pdf?arnumber=10117795
Reference14 articles.
1. Modelling and analysis of the stress distribution in a multi-thin film system Pt/USG/Si
2. Minimizing interposer warpage by process control and design optimization
3. An Advanced Finite Element Model for BiCMOS Process Oriented Ultra-Thin Wafer Deformation
4. Comparison of Mechanical Modeling to Warpage Estimation of RDL-First Fan-Out Panel-Level Packaging
5. Development of Wafer-Level Warpage and Stress Modeling Methodology and Its Application in Process Optimization for TSV Wafers
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