Impact of Phase-Change Memory Drift on Energy Efficiency and Accuracy of Analog Compute-in-Memory Deep Learning Inference (Invited)
Author:
Affiliation:
1. IBM T. J. Watson Research Center,NY,USA
2. IBM Research - Albany,Albany,NY,USA
3. IBM Research - Zurich,Rüschlikon,Switzerland
4. IBM Research - Almaden,San Jose,CA,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10117589/10117581/10117874.pdf?arnumber=10117874
Reference47 articles.
1. HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs
2. Optimization of Projected Phase Change Memory for Analog In‐Memory Computing Inference
3. HERMES Core – A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing
4. Design of projected phase-change memory mushroom cells for low-resistance drift
5. An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices
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