Fully Depleted SOI Technology for Millimeter-Wave Integrated Circuits
Author:
Affiliation:
1. Department of Electrical Engineering, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Université catholique de Louvain, Ottignies-Louvain-la-Neuve, Belgium
Funder
Ecsel JU Project “Beyond5” through EU H2020 and Innoviris, Brussels, Belgium
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials,Biotechnology
Link
http://xplorestaging.ieee.org/ielx7/6245494/9714452/09761241.pdf?arnumber=9761241
Reference44 articles.
1. RF Harmonic Distortion of CPW Lines on HR-Si and Trap-Rich HR-Si Substrates
2. Substrate crosstalk reduction using SOI technology
3. Engineering SOI substrates for RF to mmWave front-ends;allibert;Microw J,2020
4. Impact of Si substrate resistivity on the non-linear behaviour of RF CPW transmission lines
5. Identification of RF Harmonic Distortion on Si Substrates and its Reduction Using a Trap-Rich Layer
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