Gate-to-Source Leakage Current Computation in Symmetric Double Gate MOSFET incorporating Short Channel Effects
Author:
Affiliation:
1. RCC Institute of Information Technology,Department of Electronics and Communication Engineering,Kolkata,India
2. Brainware University,Department of Electronics and Communication Engineering,Barasat,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10134754/10134560/10134836.pdf?arnumber=10134836
Reference28 articles.
1. Low Power 3T XOR Cell using IDDG MOSFET
2. Analytical Investigation of Gate-to-Drain Leakage Current for Junctionless Accumulation-Mode MOSFET
3. Gate leakage current accurate models for nanoscale MOSFET transistors
4. A 20 nm gate-length ultra-thin body p-MOSFET with silicide source/drain
5. 2-D analytical modeling of drain and gate-leakage currents of cylindrical gate asymmetric halo doped dual material-junctionless accumulation mode MOSFET
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