An efficient vlsi implementation of the discrete wavelet transform using embedded instruction codes for symmetric filters
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Media Technology
Link
http://xplorestaging.ieee.org/ielx5/76/27632/01233005.pdf?arnumber=1233005
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Fault Diagnosis for Power Cables Based on Convolutional Neural Network With Chaotic System and Discrete Wavelet Transform;IEEE Transactions on Power Delivery;2022-02
2. Ultra-High Performance and Low-Cost Architecture of Discrete Wavelet Transforms;Wavelet Theory;2021-02-24
3. A generic, configurable and efficient architecture for first and second generation discrete wavelet packet transform with ultra-high speed and low-cost FPGA implementation;TECHNOLOGIES AND MATERIALS FOR RENEWABLE ENERGY, ENVIRONMENT AND SUSTAINABILITY: TMREES19Gr;2019
4. High throughput configurable architecture based on IDWPT/DWPT for impulse radio wireless communications;AIP Conference Proceedings;2019
5. FPGA Implementation of Ultra-High Speed and Configurable Architecture of Direct/Inverse Discrete Wavelet Packet Transform Using Shared Parallel FIR Filters;Advances in Science, Technology and Engineering Systems Journal;2018-09
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