Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation
Author:
Affiliation:
1. RPTU Kaiserslautern,Microelectronic Systems Design (EMS), RPTU Kaiserslautern,Landau,Germany
2. Karlsruhe Institute of Technology (KIT),Communications Engineering Lab (CEL),Germany
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10187889/10188221/10188269.pdf?arnumber=10188269
Reference12 articles.
1. Towards FPGA implementation of neural network-based nonlinearity mitigation equalizers in coherent optical transmission systems;freire;Proc ECOC,0
2. FPGA Implementation of Time-Interleaved Pruning Neural Network Equalizer for Short Reach Optical Interconnects
3. Volterra and Wiener Equalizers for Short-Reach 100G PAM-4 Applications
4. Fpga implementation of multi-layer machine learning equalizer with on-chip training;liu;Arxiv Prepr,2023
5. Efficient FPGA Implementation of an ANN-Based Demapper Using Cross-Layer Analysis
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1. Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications;2024 IEEE International Conference on Machine Learning for Communication and Networking (ICMLCN);2024-05-05
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3. From Algorithm to Implementation: Enabling High-Throughput CNN-Based Equalization on FPGA for Optical Communications;Lecture Notes in Computer Science;2023
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