Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules

Author:

Agrawal Aditya,Ansari Amin,Torrellas Josep

Publisher

IEEE

Cited by 31 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. CDAR-DRAM: Enabling Runtime DRAM Performance and Energy Optimization via In-Situ Charge Detection and Adaptive Data Restoration;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09

2. CoolDRAM: An Energy-Efficient and Robust DRAM;2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED);2023-08-07

3. HyGain: High-performance, Energy-efficient Hybrid Gain Cell-based Cache Hierarchy;ACM Transactions on Architecture and Code Optimization;2023-03

4. Introduction;Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design;2023

5. CDAR-DRAM: An In-situ Charge Detection and Adaptive Data Restoration DRAM Architecture for Performance and Energy Efficiency Improvement;2021 58th ACM/IEEE Design Automation Conference (DAC);2021-12-05

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