Author:
Chang Kevin Kai-Wei,Lee Donghyuk,Chishti Zeshan,Alameldeen Alaa R.,Wilkerson Chris,Kim Yoongu,Mutlu Onur
Cited by
105 articles.
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1. Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study on HBM2 DRAM Chips;2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN);2024-06-24
2. FASA-DRAM: Reducing DRAM Latency with Destructive Activation and Delayed Restoration;ACM Transactions on Architecture and Code Optimization;2024-05-21
3. Agile-DRAM: Agile Trade-Offs in Memory Capacity, Latency, and Energy for Data Centers;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
4. CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
5. Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02