Design and Analysis of an APU for Exascale Computing-Reference-Cited by-同舟云学术

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Design and Analysis of an APU for Exascale Computing

Published:2017-02 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)
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Author:

Vijayaraghavan Thiruvengadam,Karunanithi Arun,Kayiran Onur,Meswani Mitesh,Paul Indrani,Poremba Matthew,Raasch Steven,Reinhardt Steven K.,Sadowski Greg,Sridharan Vilas,Eckert Yasuko,Loh Gabriel H.,Schulte Michael J.,Ignatowski Mike,Beckmann Bradford M.,Brantley William C.,Greathouse Joseph L.,Huang Wei

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7920262/7920798/07920816.pdf?arnumber=7920816

Cited by 40 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Realizing the AMD Exascale Heterogeneous Processor Vision : Industry Product;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

2. Hardware support for balanced co-execution in heterogeneous processors;Proceedings of the 21st ACM International Conference on Computing Frontiers;2024-05-07

3. 11.1 AMD InstinctTM MI300 Series Modular Chiplet Package – HPC and AI Accelerator for Exa-Class Systems;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

4. Exploring the potential of exascale computing: Advancements and implications;AIP Conference Proceedings;2024

5. PreFlush: Lightweight Hardware Prediction Mechanism for Cache Line Flush and Writeback;2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT);2023-10-21

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