Efficient nested loop pipelining in high level synthesis using polyhedral bubble insertion
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/6126157/6132640/06132715.pdf?arnumber=6132715
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Wavefront Threading Enables Effective High-Level Synthesis;Proceedings of the ACM on Programming Languages;2024-06-20
2. A High-Frequency Load-Store Queue with Speculative Allocations for High-Level Synthesis;2023 International Conference on Field Programmable Technology (ICFPT);2023-12-12
3. Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04
4. Enhancing Conditional Stalling to Boost Performance of Stream-Processing Logic With RAW Dependencies;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-07
5. High-level synthesis for FPGAs: code optimization strategies for real-time image processing;Journal of Real-Time Image Processing;2017-10-04
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