Author:
Cabrera Daniel,Martorell Xavier,Gaydadjiev Georgi,Ayguade Eduard,Jimenez-Gonzalez Daniel
Cited by
19 articles.
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1. Parallelising Control Flow in Dynamic-scheduling High-level Synthesis;ACM Transactions on Reconfigurable Technology and Systems;2023-09
2. Dynamic Inter-Block Scheduling for HLS;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08
3. Compiler-assisted, adaptive runtime system for the support of OpenMP in embedded multicores;Parallel Computing;2022-05
4. On Data Parallelism Code Restructuring for HLS Targeting FPGAs;2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2021-06
5. OmpSs@FPGA framework for high performance FPGA computing;IEEE Transactions on Computers;2021