Design and Implementation of Backtracking Wave-Pipeline Switch to Support Guaranteed Throughput in Network-on-Chip-Reference-Cited by-同舟云学术

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Design and Implementation of Backtracking Wave-Pipeline Switch to Support Guaranteed Throughput in Network-on-Chip

Published:2012-02 Issue:2 Volume:20 Page:270-283
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Pham Phi-Hung,Park Jongsun,Mau Phuong,Kim Chulwoo

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx5/92/6129939/05678607.pdf?arnumber=5678607

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. PaCHNOC: Packet and Circuit Hybrid Switching NoC for Real-Time Parallel Stream Signal Processing;Micromachines;2024-02-23

2. AS-Router: A novel allocation service for efficient Network-on-Chip;Engineering Science and Technology, an International Journal;2024-02

3. PaRTAA: A Real-time Multiprocessor for Mixed-Criticality Airborne Systems;IEEE Transactions on Computers;2020

4. A novel reconfigurable router for QoS guarantees in real-time NoC-based MPSoCs;Journal of Systems Architecture;2019-11

5. A real-time on-chip network architecture for mixed criticality aerospace systems;The Aeronautical Journal;2019-08-13

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