Resource-Efficient SRAM-Based Ternary Content Addressable Memory

Author:

Ahmed AliORCID,Park Kyungbae,Baeg Sanghyeon

Funder

Ministry of Trade, Industry & Energy

Korea Semiconductor Research Consortium support program for the development of the future semiconductor device

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 44 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. C4CAM: A Compiler for CAM-based In-memory Accelerators;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3;2024-04-27

2. A novel algorithmic Data-Collision SDRAM-based TCAM architecture on FPGA;Ain Shams Engineering Journal;2024-03

3. FPGA Implementation of Double bit Error Detection and Correction in SRAM Emulated TCAMs;2023 4th IEEE Global Conference for Advancement in Technology (GCAT);2023-10-06

4. A case study: Understanding The Nature of Memories Architectures in FPGAs to Built-up Bi-CAM;Mühendislik Bilimleri ve Araştırmaları Dergisi;2023-04-30

5. Multibit soft error resilient SRAM based TCAM for FPGA;INTERNATIONAL CONFERENCE ON INNOVATIONS IN ROBOTICS, INTELLIGENT AUTOMATION AND CONTROL;2023

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