A novel algorithmic Data-Collision SDRAM-based TCAM architecture on FPGA-Reference-Cited by-同舟云学术

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A novel algorithmic Data-Collision SDRAM-based TCAM architecture on FPGA

Published:2024-03 Issue:3 Volume:15 Page:102478
ISSN:2090-4479
Container-title:Ain Shams Engineering Journal
language:en
Short-container-title:Ain Shams Engineering Journal

Author:

Trinh Nguyen^ORCID,Bui Minh^ORCID,Dang Binh^ORCID,Tran Linh^ORCID

Funder

Viet Nam National University Ho Chi Minh City

Publisher

Elsevier BV

Subject

General Engineering

Reference30 articles.

1. Content-addressable memory (cam) cir- cuits and architectures: A tutorial and survey;Pagiamtzis;IEEE J Solid State Circuits,2006

2. Reconfigurable content- addressable memory (cam) on fpgas: A tutorial and survey;Irfan;Future Gener Comput Syst,2022

3. Sun Y, Kim M. Ip prefix matching with binary and ternary cams. In: 2010 7th IEEE consumer communications and networking conference, 2010, p. 1–2. doi:10.1109/CCNC.2010.5421680.

4. Smart ternary content addressable memory (stcam) archi- tecture;Ray,2012

5. Ternary cam compaction for ip ad- dress lookup;Fang,2008

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