ER-TCAM: A Soft-Error-Resilient SRAM-Based Ternary Content-Addressable Memory for FPGAs-Reference-Cited by-同舟云学术

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ER-TCAM: A Soft-Error-Resilient SRAM-Based Ternary Content-Addressable Memory for FPGAs

Published:2020-04 Issue:4 Volume:28 Page:1084-1088
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Ullah Inayat^ORCID,Yang Joon-Sung^ORCID,Chung Jaeyong^ORCID

Funder

Samsung

IDEC, Daejeon, South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/9043771/09005222.pdf?arnumber=9005222

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. TeRa: Ternary and Range based packet classification engine;Integration;2024-05

2. A Partitioned CAM Architecture with FPGA Acceleration for Binary Descriptor Matching;ACM Transactions on Reconfigurable Technology and Systems;2024-01-27

3. Error Resolving in SRAM Emulated FPGA using CRC;2023 Third International Conference on Secure Cyber Computing and Communication (ICSCCC);2023-05-26

4. A Reliable and High-Speed 6T Compute-SRAM Design With Dual-Split-V _DD Assist and Bitline Leakage Compensation;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-05

5. Deterministic Approach for Range-enhanced Reconfigurable Packet Classification Engine;ACM Transactions on Reconfigurable Technology and Systems;2023-04-17

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