Author:
Abdel-Hafeez Saleh,Quwaider Muhannad Q.
Cited by
4 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A 16-Byte Asynchronous Gray Code FIFO Memory Using Verilog HDL for Real Time Applications;2024 2nd International Conference on Device Intelligence, Computing and Communication Technologies (DICCT);2024-03-15
2. IOLock: An Input/Output Locking Scheme for Protection Against Reverse Engineering Attacks;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-02
3. FPGA Implementation of Asynchronous FIFO;Proceedings of International Conference on Industrial Instrumentation and Control;2022
4. Reconfigurable FIFO memory circuit for synchronous and asynchronous communication;International Journal of Circuit Theory and Applications;2021-01-12