A 256Gb/s/mm-shoreline AIB-Compatible 16nm FinFET CMOS Chiplet for 2.5D Integration with Stratix 10 FPGA on EMIB and Tiling on Silicon Interposer-Reference-Cited by-同舟云学术

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A 256Gb/s/mm-shoreline AIB-Compatible 16nm FinFET CMOS Chiplet for 2.5D Integration with Stratix 10 FPGA on EMIB and Tiling on Silicon Interposer

Published:2021-04 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE Custom Integrated Circuits Conference (CICC)
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Author:

Liu Chester,Botimer Jacob,Zhang Zhengya

Funder

Office of Naval Research

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9431363/9431390/09431555.pdf?arnumber=9431555

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. New Standard-under-Development for Chiplet Interconnect Test and Repair: IEEE Std P3405;2024 IEEE European Test Symposium (ETS);2024-05-20

2. HyDe: A Hybrid PCM/FeFET/SRAM Device-Search for Optimizing Area and Energy-Efficiencies in Analog IMC Platforms;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2023-12

3. Heterogeneous Die-to-Die Interfaces: Enabling More Flexible Chiplet Interconnection Systems;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

4. Cancer Survivorship in the Indo-Pacific: Priorities for Progress;JCO Global Oncology;2023-06

5. Signal and Power Integrity Design and Analysis for Bunch-of-Wires (BoW) Interface for Chiplet Integration on Advanced Packaging;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05

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