ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing

Author:

Tan ChengORCID,Xie Chenhao,Geng Tong,Marquez Andres,Tumeo AntoninoORCID,Barker Kevin,Li AngORCID

Funder

Compute-Flow-Architecture

U.S. Department of Energy

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Signal Processing

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. RMSRM: real-time monitoring-based self-reconfiguration mechanism in reconfigurable PE array;The Journal of Supercomputing;2023-11-03

2. Automatic Compilation of CNN on Reconfigurable Array Processor Based on Scalable Instruction Group Library;IEEE Access;2023

3. A Data-Centric Accelerator for High-Performance Hypergraph Processing;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10

4. A Framework for Neural Network Inference on FPGA-Centric SmartNICs;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08

5. ASAP;Proceedings of the 36th ACM International Conference on Supercomputing;2022-06-28

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