Integrating QD-NVRAMs and QDC-SWS FET-Based Logic for Multi-Bit Computing

Abstract

This paper presents FETs with vertically-stacked multiple quantum dot (QD) layers, comprising of GeOx cladded Ge quantum dots, serving as transport channel, floating gate in memory cell, and quantum dot gate that exhibit multi-state characteristics. The structures can be used as 8- and 16-state logic, a room-temperature alternative to sub-milliKelvin Si/SiGe qubits. In addition, they can be used as distributed NVRAMs with fast Write/Erase, SRAMs, and multi-state CMOS-X logic applications. Here, X symbolizes Multi-state CMOS compatible operations using SWS or QDC FETs or memories. The novelty includes: (i) coding of distinct states based on drain current changes in quantum dot channels via intra-sub band transitions and spatial location of carrier wavefunctions, (ii) integrating QDC-NVRAM cells with SRAM based cache, and multi-bit logic based computing.