Modeling and Simulation of Quasi-Ballistic III-Nitride Transistors for RF and Digital Applications

Abstract

This paper presents a self-consistent analytic model to describe the current-voltage (I-V) and charge-voltage (Q-V) behavior of quasi-ballistic III-nitride transistors. We focus on two types of transistor geometries: (i) high electron mobility transistors (HEMTs) suitable for radio frequency (RF) applications and (ii) nanowire field-effect transistors (FETs) for digital applications. Our core model is based on Landauer transport theory which is combined with the calculation of charge density and velocity of charges at the top-of-the-barrier in the transistor. The effect of extrinsic device features, such as the nonlinearity of access regions and Joule heating at high currents, are included in the static I-V model. In the case of the dynamic Q-V model, we calculate intrinsic terminal charges by approximating the solution of the 2D Poisson equation in the channel over a broad bias range. The effect of fringing capacitances, prominently inner-fringing capacitance that varies nonlinearly with the gate bias, is included in our Q-V model. We amend the model electrostatics and the description of source/drain rectifying contacts in our core model to represent the I-V characteristics of III-nitride nanowire FETs. The model shows excellent match against experimentally and numerically measured characteristics of GaN transistors with gate lengths ranging from 42 nm to 274 nm. With only 38 input parameters, most of which are extracted based on straightforward device characterization, our model can be used for device-circuit co-design and optimization using a standard hierarchical circuit simulator.