SEMICONDUCTOR DEVICE SCALING: PHYSICS, TRANSPORT, AND THE ROLE OF NANOWIRES

Author:

FERRY D. K.1,AKIS R.1,GILBERT M. J.1,CUMMINGS A.1,RAMEY S. M.2

Affiliation:

1. Department of Electrical Engineering and Center for Solid State Electronics Research, Arizona State University, Tempe, AZ 85287-5706, USA

2. Intel Corporation, Hillsboro, OR 97124, USA

Abstract

Nanoelectronics (including nanomagnetics and nanophotonics) generally refers to nanometer scale devices, and to circuits and architectures which are composed of these devices. Continued scaling of the devices into the nanometer range leads to enhanced information processing systems. Generally, this scaling has arisen from three major sources, one of which is reduction of the physical gate length of individual transistors. Until recently, this has also allowed an increase in the clock speed of the chip, but power considerations have halted this to levels around 4 GHz in Si. Indeed, there are indications that scaling itself may be finished by the end of this decade. Instead, there are now pushes to seek alternative materials for nano-devices that may supplement the Si CMOS in a manner that allows both higher speeds and lower power. In this paper, we will cover some of the impending limitations, and discuss some alternative approaches that may signal continued evolution of integrated circuits beyond the end of the decade.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electronic, Optical and Magnetic Materials

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