Study of Soft Errors in Spiking Neural Network Hardware

Abstract

The problem of soft errors in the hardware implementation of Spiking Neural Networks (SNN) has always been a challenge. SNNs, unlike traditional deep learning networks, simulate the temporal dynamic behavior of biological neurons and emit spikes when a specific threshold is reached. In recent years, the hardware implementation of SNNs has shown great potential in performing efficient and low-power tasks, but as technology nodes shrink and integrated circuit complexity increases, soft errors become a key challenge. To this end, we propose a novel approach based on input and weight analysis, through specific algorithms at the hardware level, to significantly reduce the probability of soft errors affecting the results. In terms of training accuracy, our method maintains a high accuracy under various voltage fluctuation conditions, demonstrating its superior robustness.