A Low-Power, Sub-1-V All-MOSFET Subthreshold Voltage Reference Using Body Biasing

Author:

Pal Pratosh Kumar1ORCID,Nagaria Rajendra Kumar1

Affiliation:

1. Department of Electronics and Communication Engineering, Motilal Nehru National Institute of Technology Allahabad, Prayagraj 211004, Uttar Pradesh, India

Abstract

A low-voltage and low-power all-MOSFET voltage reference is presented having most of the transistors working in subthreshold region. The basic beta-multiplier with cascode transistor provides a supply-independent current utilized by the active load circuit to generate an output reference voltage using body biasing. The proposed circuit is simulated using standard SCL 180-nm CMOS technology for the supply voltage ranging from 0.75[Formula: see text]V to 1.8[Formula: see text]V. The simulation obtains an average output voltage reference of 450.4[Formula: see text]mV for the given supply range at room temperature. The minimum power dissipation at room temperature is 54.37[Formula: see text]nW. The temperature coefficient (TC) of 28.13[Formula: see text]ppm/C is achieved having the temperature range of [Formula: see text]10–87C for the minimum operating supply voltage. It has the PSRR values of [Formula: see text]39.4[Formula: see text]dB at 100[Formula: see text]Hz and [Formula: see text]12[Formula: see text]dB at 1[Formula: see text]MHz. Also, the active area of the proposed circuit is 0.014[Formula: see text]mm2.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

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