Hardware-Based Built-In Security Module in System on Chip (SoC) without System Slowdowns or Loss of Productivity

Author:

Dharane Pradeep1ORCID,Shiurkar Ulhas D.2

Affiliation:

1. Applied Micro Circuits Corporation (AMCC), Santa Clara 95054-1288, USA

2. Deogiri Institute of Engineering & Management Studies, Aurangabad, India

Abstract

The system environments are built with extensible, flexible, extensible and feature-rich platforms that provide consumers with the benefits of several services, applications and devices. However, the evolution of the internet and shared networks has changed the computing systems more vulnerable to attacks based on the operating system, software and hardware levels. Due to this, there is a growing need to ensure the software and hardware platforms are being secured from viruses or other unauthorized operations. In this paper, a new Hardware-based built-in security module has been proposed in System on Chip (SoC) without loss of productivity and system slowdown. The proposed process integrates a Hardware security module within the SoC, and it establishes higher visibility and controllability of the SoC than achieved from an external device. First, the proposed method allows the SoC to check without dependency on other unsecured elements within the system. Then, the method can examine some components within the SoC on its own to test from time-to-time that no unauthorized access or attempts to bypass the integrity of the system or SoC has been made. After, it allows the SoC to be controlled without any dependency on other unsecured components or communication via unsecured external interfaces. IxChariot is used to carry out the performance test, and then the hardware-based security is proved using Atheros Mini PCIeXB112 cards. As a result, better TCP throughputs of 571, 571 and 604 have been determined in normal mode, and in burst mode, 580, 572 and 619 throughputs have been determined. Finally, the security hardware provides security without system slowdown or lost productivity and burdening the host processor.

Publisher

World Scientific Pub Co Pte Ltd

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Media Technology

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