Affiliation:
1. Department of Computer Engineering, Princess Sumaya University for Technology, Amman 11941, Jordan
Abstract
In earlier publications, many researchers have addressed the problem of residue-to-binary conversion for the popular moduli set [Formula: see text], where [Formula: see text] is a positive integer greater than 1. In this paper, we are proposing, potentially, the fastest converter ever for this moduli set with the least hardware requirements. Moreover, the paper revisits the extended three-moduli set [Formula: see text], where [Formula: see text] is a positive integer such that [Formula: see text]. This paper proposes an efficient residue-to-binary converter with an adjustable structure. The proposed structure allows increasing the dynamic range at a cost of two gates per bit. When compared with a similar published work for the extended moduli set, the proposed extended converter showed significant reductions in area by 9.9–13.4%, in delay by 16.9–24.1% and in power consumption by 10.6–16.7%.
Publisher
World Scientific Pub Co Pte Lt
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture
Cited by
14 articles.
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