Design Methodology of High Frequency M-ary ASK, FSK and QAM

Abstract

This paper proposes a high data rate, low-power, low-voltage design of OTA-based M-ary ASK, FSK and QAM modulator and demodulator circuits. Conventional D/A converter of M-ary circuit has been replaced with the operational transconductance amplifier-based n-bits to 2n level converter which operates with input frequencies up to 2.1 GHz. OTA-based oscillator and PLL is being designed for high speed M-ary FSK. Eye diagram analysis has been carried out, conforming a very low signal distortion. Theoretical analysis of bit error rate has been done. The circuit analysis and simulation results confirm the reliability and accuracy of the design. Effective layouts and die photographs of the proposed designs are also presented.