Spin-Based Fully Nonvolatile Full-Adder Circuit for Computing in Memory

Abstract

As CMOS technology scales down toward below 2-digit nanometer dimensions, exponentially increasing leakage power, vulnerability to radiation induced soft errors have become a major problem in today’s logic circuits. Emerging spin-based logic circuits and architectures based on nonvolatile magnetic tunnel junction (MTJ) cells show a great potential to overcome the aforementioned issues. However, radiation induced soft errors are still a problem in MTJ-based circuits as they need sequential peripheral CMOS circuits for sensing the MTJs. This paper proposes a novel nonvolatile and low-cost radiation hardened magnetic full adder (MFA). In comparison with the previous designs, the proposed MFA is capable of tolerating particle strikes regardless of the amount of charge induced to a single node and even multiple nodes. Besides, the proposed MFA offers low power operation, low area and high performance as compared with previous counterparts. One of the most important features suggested by the proposed MFA circuit is full nonvolatility. Nonvolatile logic circuits remove the cost of high volume data transactions between memory and logic and also facilitate power gating in logic-in-memory architectures.