Low Power and Fully Nonvolatile Full-Adder Based on STT-SHE-MRAM

Abstract

Currently, static circuit power is becoming a major concern, dominating the total power consumption due to the scaling down of CMOS technology. The smaller sizes drastically affect the leakage current, which integrated circuit designers attempt to overcome this issue. Hence, several methods and technologies have been proposed to prevail this phenomenon. One of these methods is using memory structures in logic designs. A Hybrid MTJ/CMOS circuit is one of these promising techniques to design low-power nonvolatile circuits with power gating ability and low overhead for reconfigurable possibilities. In this paper, we have proposed a fully nonvolatile, low-power Full-Adder based on MTJs that uses the spin transfer torque method assisted by the spin hall effect. Simulation results of these designs by HSPICE show that they can work fast with low-power consumption compared to other state-of-the-art nonvolatile full-adders.