On Approach to Increase Integration Rate of Double-Gate Heterotransistors

Abstract

In this paper, we introduce an approach to manufacture a field-effect heterotransistor with two gates. In the framework approach, we consider a heterostructure with required configuration, doping of required parts of the heterostructure by diffusion and/or ion implantation and optimization of annealing of dopant or radiation defects. The introduced approach of manufacturing a transistor gives us the possibility to decrease area of surface and thickness of the transistor. In this paper, we also introduce an approach to make prognosis of mass and heat transport with account variation of parameters of these processes in space in time and nonlinearity of these processes.