Energy Efficient Tri-State CNFET Ternary Logic Gates

Author:

Tabrizchi Sepehr1,Sharifi Fazel2ORCID,Badawy Abdel-Hameed3

Affiliation:

1. School of Computer Science Institute for Research in Fundamental Sciences (IPM), Tehran, Iran

2. Department of Electrical and Computer Engineering, Graduate University of Advanced Technology, Kerman, Iran

3. Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USA

Abstract

Power consumption and especially leakage power are the main concerns of nano MOSFET technology. On the other hand, binary circuits face a huge number of interconnection wires, which results in power dissipation and area. Researchers introduced emerging nanodevices and multiple-valued logic (MVL) as two feasible solutions to overcome the challenges mentioned above. Carbon nanotube field-effect transistor (CNFET) is one of the emerging technologies that has some unique properties and advantages over MOSFET, such as adjusting the carbon nanotube (CNT) diameters to have the desired threshold voltage and have the same mobility as P-FET and N-FET transistors. In this paper, we present a novel method for designing ternary logic circuits based on CNFETs. Each of our designed logic circuits implements a logic function and its complementary via a control signal. Also, these circuits have a high impedance state, which saves power while the circuits are not in use. Moreover, we designed a two-digit adder/ subtractor and a power-efficient ternary logic arithmetic logic unit (ALU) based on the proposed gates. The proposed ternary circuits are simulated using HSPICE via standard 32 nm CNFET technology. The simulation results indicate the designs’ correct operation under different process, voltage, and temperature (PVT) variations. Also, simulation results show that the two-digit adder/ subtractor using our proposed gates has 12X and 5X lower power consumption and power-delay product (PDP), respectively, compared to previous designs.

Publisher

World Scientific Pub Co Pte Ltd

Subject

Electrical and Electronic Engineering,Computer Science Applications,Condensed Matter Physics,General Materials Science,Bioengineering,Biotechnology

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Power Efficient CNTFET-Based Ternary Comparators;Journal of The Institution of Engineers (India): Series B;2023-12-29

2. Effect of Transistor Sizing on Noise Margin Enlargement of Ternary Gates;2023 International Conference on Evolutionary Algorithms and Soft Computing Techniques (EASCT);2023-10-20

3. Highly-Efficient CNTFET-Based Unbalanced Ternary Logic Gates;ECS Journal of Solid State Science and Technology;2023-03-01

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