Affiliation:
1. Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, India
Abstract
Multi-core and multi-processor architectures have predominated the domain of embedded systems permitting easy mapping of concurrent applications to such architectures. The programs, in general, are subjected to significant optimizing and parallelizing transformations, automated and also human guided, before being mapped to an architecture. Modelling parallel behaviour and formally verifying that their functionality is preserved during synthesis are challenging tasks. Untimed PRES+ models are found to be suitable for the specification of parallel behaviour. Path cover oriented equivalence checking methods have been found to be quite effective for sequential behaviour. Path construction for parallel behaviour, however, is significantly more complex than that for sequential behaviour due to all possible interleavings of the parallel operations. Identification of the path covers depends upon choosing appropriate cut-points. In this paper, the need for introducing cut-points dynamically has been underlined and a mechanism to achieve this task is proposed. Details on how to construct a path cover using dynamic cut-points is presented.
Publisher
World Scientific Pub Co Pte Lt
Subject
Hardware and Architecture,Theoretical Computer Science,Software
Cited by
8 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Translation validation of coloured Petri net models of programs on integers;Acta Informatica;2022-04-06
2. SamaTulyataOne;Proceedings of the 12th Innovations on Software Engineering Conference (formerly known as India Software Engineering Conference);2019-02-14
3. Equivalence checking of Petri net models of programs using static and dynamic cut-points;Acta Informatica;2018-04-23
4. PRESGen;Proceedings of the 2017 Workshop on Software Engineering Methods for Parallel and High Performance Applications;2017-06-26
5. An End-to-end Formal Verifier for Parallel Programs;Proceedings of the 12th International Conference on Software Technologies;2017