QUASI TWO-DIMENSIONAL ANALYSIS OF THE SURFACE POTENTIAL FOR POLY-Si THIN FILM TRANSISTORS BASED ON THE CHANNEL POTENTIAL

Abstract

A quasi two-dimensional analysis of the surface potential for polycrystalline silicon thin film transistors based on the channel potential is developed. Since the drain bias is taken into account, the surface potential model is proposed to approach the surface potential in the two-dimensional device although this model is developed by solving the one-dimensional Poisson's equation. This model is derived under the relative high gate and low drain biases while devices are operated in the strong inversion region. It is obtained by introducing the channel potential expression containing the drain bias and the normalized channel distance. And this channel-potential-based surface potential model is verified by the two-dimensional-device simulator in various gate voltages, various drain voltages and various channel lengths. This model well characterizes the surface potential distribution along the device's channel in the strong inversion region under the relative high gate and low drain biases.