Asynchronous Logic Implementation Based on Factorized DIMS

Author:

Lemberski Igor12

Affiliation:

1. Ventspils International Radio Astronomy Center, Ventspils University College, Inženieru 101a, Ventspils LV-3601, Latvia

2. Information Technology Department, Baltic International Academy, Lomonosova, 4, Riga LV-1019, Latvia

Abstract

One of the popular methods of asynchronous logic implementation is based on so called Delay-Insensitive-Minterm-System (DIMS), where a sum-of-minterms (SOM) function is given and each minterm is represented using a state-holding (C-) element. However, such implementation is rather expensive since minterm minimization is not allowed. In the paper, structure called factorized DIMS is proposed. It is shown that under realistic delay limitation, instead of SOM, strong indication can be ensured for the sum of mutually orthogonal product terms resolved into factorized form. It reduces significant implementation complexity.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Synthesis of QDI Combinational Circuits Based at the New Factorized DIMS;2023 IEEE Seventh Ecuador Technical Chapters Meeting (ECTM);2023-10-10

2. Design of Quasi Delay Insensitive Combinational Circuits Based on Optimized DIMS;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27

3. Synthesis of Early Output Quasi Delay-Insensitive Combinational Circuits;2022 IEEE ANDESCON;2022-11-16

4. Synthesis of QDI Combinational Circuits Implemented on Optimized Model;2022 IEEE Sixth Ecuador Technical Chapters Meeting (ETCM);2022-10-11

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