Affiliation:
1. Department of Electronic Engineering, Seoul National University of Science and Technology, Seoul 01811, Republic of Korea
Abstract
In wearable devices, power consumption is a serious issue since wearable devices must maintain the power-on state at any time. In healthcare system, a variety of signal processing operations occupy a large portion of overall workload because it has periodic and heavy computational workloads. In this paper, we propose a low-power System on Chip (SoC) architecture for wearable healthcare devices. In order to reduce power consumption of processor, we design a hardware accelerator that handles signal processing and provides computation offloading. Furthermore, to minimize the area and maximize the performance of the accelerator, we optimize the operation bit-width by analyzing the frequency response. The low-power healthcare SoC was fabricated with 0.11[Formula: see text][Formula: see text]m CMOS process. Finally, we measured the power consumption of our chip and verified the applicability of the digital filter accelerator, which reduces the energy consumption for embedded processor.
Publisher
World Scientific Pub Co Pte Lt
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture
Cited by
9 articles.
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