Compact Charge-Controlled Memristance Simulator with Electronic/Resistive Tunability

Abstract

The work endeavors to realize a single Voltage Differencing Current Conveyor (VDCC)-based current-controlled memristor emulator with charge-dependent linear memristance function. Such current-controlled memristors closely model the current ([Formula: see text])–voltage ([Formula: see text]) relationship of the popular TiO2-based physical memristor architecture constructed by Hewlett–Packard (HP). The presented emulator circuit comprises only two grounded passive elements and two external MOS transistors along with a VDCC active element and provides the facility of electronic/resistive tunability. It is found through the detailed literature survey that the presented circuit is the most compact design to realize a charge-controlled memristance simulator as compared to any previously reported structure. The designed configuration has been verified through presented simulation results generated using PSPICE based on 0.18[Formula: see text][Formula: see text]m CMOS technology. It has also been validated through relaxation and chaotic oscillators developed using the proposed VDCC-based memristor emulator and output waveforms have been shown. Furthermore, the discussed memristor emulator has been implemented and verified through commercial ICs, AD844 and LM13700.